Jong Hoon Shin
Hi! I started out trying to understand the world through physics, mathematics, electrical engineering, and computer science—and ended up building technology that tries to make it better. These days, I work in computer architecture, artificial intelligence, hardware acceleration, software-hardware co-design, and performance modeling. I love learning new things, organizing what I learn, and turning it into something useful. Most of my time is spent thinking about how to make computers more faster and more efficient. I used to dream about people like Richard Feynman, John Bardeen, and John von Neumann – now I’m trying to live a version of that dream through silicon and code. I’m always up for a good book, a deep problem, or a fresh idea.
Work Experience/Education

Machine Learning ASIC Engineer, Meta, Sunnyvale, California
I recently joined the Infra Silicon Architecture team at Meta as a Machine Learning ASIC Engineer. My work focuses on performance modeling for Meta’s next-generation accelerator architectures, designed to efficiently handle the company’s diverse AI workloads.
One of Meta’s public efforts in this space includes the MTIA (Meta Training and Inference Accelerator), an in-house family of custom silicon chips optimized for AI inference workloads. MTIA reflects Meta’s growing investment in vertical integration — building hardware and software together to meet the specific performance and efficiency needs of large-scale AI applications such as ranking and recommendation systems.
I’m excited to contribute to this mission and to grow as an engineer through this opportunity.

Staff Hardware Engineer, Samsung Semiconductor Inc., San Jose, California
(July, 2019 – May, 2025)
At Samsung, I worked on performance modeling and architectural optimization across a range of computing systems — from RISC-V CPUs to deep learning accelerators and distributed AI hardware. My focus was on co-designing hardware and software to meet the growing demands of AI and scientific workloads.
Key projects included developing a cycle-accurate model of a RISC-V OoO CPU, simulating distributed training systems using DAG-based models of large language algorithms, and analyzing SoC-level memory systems with SystemC. I also built analytic models for AI accelerators, exploring dataflow, memory hierarchies, and interconnects, and proposed optimization techniques using mixed precision, sparsity, and compression.
Ph.D, Electrical Engineering, University of Michigan, Ann Arbor, Michigan
(September, 2014 – May, 2019)
As AI and big data workloads continue to stress traditional memory systems, RRAM-based hardware accelerators have drawn attention for enabling neuromorphic and in-memory computing. With advantages like nanoscale size, low power, and synapse-like behavior, RRAM provides a promising path toward non-von Neumann architectures.
I implemented RRAM-based accelerators for stochastic learning in deep neural networks and simulated annealing of spin glass systems. Using tantalum oxide-based analog RRAM arrays and Oja’s rule, I demonstrated real-time feature extraction and online dimensionality reduction. I also helped develop Cu-based RRAM devices with high on/off ratios and ultra-low power for digital neuromorphic and in-memory computing applications.

Research Engineer, LG Electronics, Seoul, South Korea
(July, 2011 – June, 2014)
Driven by a strong interest in solid-state physics and real-world impact, I began my career at LG Electronics researching energy-efficient power electronics. I focused on the development and simulation of III-V compound semiconductor transistors—such as GaAs and InGaAs/AlGaAs—for next-generation automotive power devices.
During this time, I explored advanced device architectures like planar and nanowire gate-all-around FETs, using TCAD tools to model short-channel effects and optimize subthreshold performance. These projects deepened my understanding of semiconductor device physics and system-level design, bridging material properties with practical applications in low-power, high-frequency systems.

Master of Science, Physics, Seoul National University, Seoul, South Korea
(March, 2008 – February, 2010)
During my Master of Science in Physics, advised by Prof. Tae Won Noh, I conducted research on the solid-state physics of superconducting materials, focusing on their behavior through optical spectroscopy. This period was instrumental in deepening my understanding of how general principles in physics—such as quantum mechanics, optics, solid state physics, and electromagnetism—manifest in real materials. It also taught me how to experimentally and analytically investigate these phenomena, bridging theory and application, planning and conducting self-driven research project.

Bachelor of Science, Physics, Seoul National University, Seoul, South Korea
(March, 2002 – February, 2008)
As an undergraduate, I explored the foundations of physics—quantum mechanics, electrodynamics, and classical mechanics—motivated by the ideas of thinkers like Feynman, Bohr, Bardeen, and von Neumann. To deepen this understanding, I studied mathematics (linear algebra, vector calculus, complex analysis, differential equations) and applied sciences such as computer science, electronic circuits, optics, and solid-state physics. I also joined a philosophy and social science reading club called “Small College” and worked as a teaching assistant. These experiences shaped my interest in the societal impact of science.
Publications
[1] Jong Hoon Shin, Ali Shafiee, Ardavan Pedram, Hamzah Abdel-Aziz, Ling Li, and Joseph Hassoun. “Griffin: Rethinking sparse optimization for deep learning architectures”. In: 2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA). IEEE. 2022, pp. 861–875. [2] Hamzah Abdelaziz, Ali Shafiee, Jong Hoon Shin, Ardavan Pedram, and Joseph Hassoun. “Rethinking floating point overheads for mixed precision DNN accelerators”. In: Proceedings of Machine Learning and Systems 3 (2021), pp. 223–239. [3] John Moon, Wen Ma, Jong Hoon Shin, Fuxi Cai, Chao Du, Seung Hwan Lee, and Wei D. Lu. “Temporal data classification and forecasting using a memristor-based reservoir computing system”. In: Nature Electronics 2.10 (2019), pp. 480–487. [4] Jong Hoon Shin. “Resistive Switching Devices and Their Applications for Computing Beyond von Neumann Architecture”. PhD thesis. Electrical Engineering, University of Michigan, Ann Arbor, 2019.
[5] YeonJoo Jeong, Jihang Lee, John Moon, Jong Hoon Shin, and Wei D. Lu. “K-means data clustering with memristor networks”. In: Nano letters 18.7 (2018), pp. 4447–4453.
[6] Jong Hoon Shin, Yeon Joo Jeong, Mohammed A Zidan, Qiwen Wang, and Wei D. Lu. “Hardware acceleration of simulated annealing of spin glass by RRAM crossbar array”. In: 2018 IEEE International Electron Devices Meeting (IEDM). IEEE. 2018, pp. 3–3. [7] Jong Hoon Shin, Qiwen Wang, and Wei D. Lu. “Self-limited and forming-free CBRAM device with double Al2O3 ALD layers”. In: IEEE Electron Device Letters 39.10 (2018), pp. 1512–1515. [8] Shinhyun Choi*, Jong Hoon Shin*, Jihang Lee, Patrick Sheridan, and Wei D. Lu (*:Equally Contributed.) ““Experimental Demonstration of Feature Extraction and Dimensionality Reduction using Memristor Networks”. In: Nano Letters (2017). [9] Mohammed A Zidan, YeonJoo Jeong, Jong Hoon Shin, Chao Du, Zhengya Zhang, and Wei D. Lu. “Field-programmable crossbar array (FPCA) for reconfigurable computing”. In: IEEE Transactions on Multi-Scale Computing Systems 4.4 (2017), pp. 698–710. [10] In Hak Lee, Yong Hyun Kim, Young Jun Chang, Jong Hoon Shin, T Jang, and Seung Yup Jang. “Temperature-dependent hall measurement of AlGaN/GaN heterostructures on Si substrates”. In: Journal of the Korean Physical Society 66 (2015), pp. 61–64. [11] Jong Hoon Shin, Kwang-Choong Kim, and Kyu Sang Kim. “Investigating gate metal induced reduction of surface donor density in GaN/AlGaN/GaN heterostructure by electroreflectance spectroscopy”. In: Current Applied Physics 15.11 (2015), pp. 1478–1481. [12] Seung Yup Jang, Jong-Hoon Shin, Eu Jin Hwang, Hyo-Seung Choi, Hun Jeong, Sang-Hun Song, and Hyuck-In Kwon. “Investigation of buffer traps in AlGaN/GaN heterostructure field-effect transistors using a simple test structure”. In: Journal of Semiconductor Technology and Science 14.4 (2014), pp. 478–483. [13] Beom Soo Joo, Moonsup Han, Young Jun Chang, Jong Hoon Shin, Seung Yup Jang, and Taehoon Jang. “High-resolution X-ray photoemission study of photo-grown Ga 2 O 3 in GaN/AlGaN/GaN heterostructures on Si substrates”. In: Journal of the Korean Physical Society 63 (2013), pp. 2314–2318. [14] Jong-Hoon Shin, Jinhong Park, SeungYup Jang, T Jang, and Kyu Sang Kim. “Metal induced inhomogeneous Schottky barrier height in AlGaN/GaN Schottky diode”. In: Applied Physics Letters 102.24 (2013). [15] Jong-Hoon Shin, Jinhong Park, SeungYup Jang, Tae-Hoon Jang, and Kyu Sang Kim. “Gate metal dependent reverse leakage mechanisms in AlGaN/GaN Schottky diode”. In: Japanese Journal of Applied Physics 52.7R (2013), p. 070203. [16] Jong Hoon Shin, Young Je Jo, Kwang-Choong Kim, T Jang, and Kyu Sang Kim. “Gate metal induced reduction of surface donor states of AlGaN/GaN heterostructure on Si-substrate investigated by electroreflectance spectroscopy”. In: Applied Physics Letters 100.11 (2012). [17] S. J. Moon, J. H. Shin, D. Parker, W. S. Choi, I. I. Mazin, Y. S. Lee, J. Y. Kim, N. H. Sung, B. K. Cho, S. H. Khim, J. S. Kim, K. H. Kim, and T. W. Noh. “Dual character of magnetism in EuFe 2 As 2: Optical spectroscopic and density-functional calculation study”. In: Physical Review B—Condensed Matter and Materials Physics 81.20 (2010), p. 205114.